operating system - Interrupt routing for PCIe slot directly connected to the CPUs -

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if @ haswell architectural diagram today can see there pcie lanes directly connected cpu (for graphics) of them routed the platform controller hub (southbridge replacement): intel c22x chipset diagram

if intel 8 series data-sheet (the specification of c222) find intel c222 contains i/o apic used route legacy intx interrupts (chapter 5.10). question happens if legacy intx interupt requests arrives directly @ cpu (over pcie 3.0 lanes). have forwarded c222 first or there i/o apic in system agent have program in case? also, intel virtualization technology directed i/o there additional indirection, interrupt remapping table. table in system agent (former northbridge) on cpu or on c222 , mean interrupts pcie 3.0 lanes need routed c222 first in case remapping enabled?


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